1. Field
Embodiments described in this specification relate to a semiconductor memory device comprising an arrangement of memory cells, the memory cells configured to store data by change in a resistance value of a variable resistor.
2. Description of the Related Art
In recent years, along with a rising level of integration in semiconductor devices, circuit patterns of transistors and so on configuring these semiconductor devices are being increasingly miniaturized. Required in this miniaturization of the patterns is not simply a thinning of line width but also an improvement in dimensional accuracy and positioning accuracy of the patterns. This trend applies also to semiconductor memory devices.
Conventionally known and marketed semiconductor memory devices such as DRAM, SRAM, and flash memory each use a MOSFET as a memory cell. Consequently, there is required, accompanying the miniaturization of patterns, an improvement in dimensional accuracy at a rate exceeding a rate of the miniaturization. As a result, a large burden is placed also on the lithography technology for forming these patterns which is a factor contributing to a rise in product cost.
In recent years, resistance varying memory is attracting attention as a candidate to succeed these kinds of semiconductor memory devices employing a MOSFET as a memory cell. The resistance varying memory herein includes not only resistance varying memory (ReRAM: Resistive RAM) in its narrow definition, which uses a transition metal oxide as a recording layer to store a resistance state of the transition metal oxide in a non-volatile manner, but also phase change memory (PCRAM: Phase Change RAM), which uses chalcogenide or the like as a recording layer to utilize resistance information of a crystalline state (conductor) and an amorphous state (insulator).
Write of data to a memory cell is performed by applying a certain voltage to a variable resistor for a short time. This causes the variable resistor to change from a high-resistance state to a low-resistance state. This operation to change the variable resistor from the high-resistance state to the low-resistance state is hereafter referred to as a setting operation.
On the other hand, erase of data in a memory cell is performed by applying a certain voltage to a variable resistor for a long time, the certain voltage being lower than the voltage applied during the setting operation, and the variable resistor being one in the low-resistance state subsequent to the setting operation. This causes the variable resistor to change from the low-resistance state to the high-resistance state. This operation to change the variable resistor from the low-resistance state to the high-resistance state is hereafter referred to as a resetting operation. The memory cell adopts, for example, the high-resistance state as a stable state (reset state), and, in the case of binary data storage, write of data is performed by the setting operation in which the reset state is changed to the low-resistance state.
During the resetting operation, a large current, which acts as a resetting current, must be passed through the memory cell. As a result, a diode connected in series to the variable resistor is required to have an output current which is large. However, if a simple PN junction diode is used for the diode, an unselected memory cell cannot be applied with a voltage greater than a voltage determined by the junction breakdown voltage of the PN junction diode, whereby the output current of the PN junction diode is limited.